Chapter 10 Analog-to-Digital Converter (ADC12B_LBA_V1)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
395
10.4.2.24 ADC Command and Result Offset Register 1 (ADCCROFF1)
It is important to note that these bits do not represent absolute addresses instead it is an sample offset
(object size 16bit for RVL, object size 32bit for CSL).
Read: Anytime
Write: These bits are writable if bit ADC_EN clear or bit SMOD_ACC set
Module Base + 0x0025
7
6
5
4
3
2
1
0
R
0
CMDRES_OFF1[6:0]
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-27. ADC Command and Result Offset Register 1 (ADCCROFF1)
Table 10-31. ADCCROFF1 Field Descriptions
Field
Description
6-0
CMDRES_OFF1
[6:0]
ADC Result Address Offset Value
— These bits represent the conversion command and result offset value
relative to the conversion command base pointer address and result base pointer address in the memory map
to refer to CSL_1 and RVL_1. It is used to calculate the address inside the system RAM to which the result at
the end of the current conversion is stored to and the area (RAM or NVM) from which the conversion commands
are loaded from. These bits do not represent absolute addresses instead it is an sample offset (object size 16bit
for RVL, object size 32bit for CSL).,These bits can only be modified if bit ADC_EN is clear. See also
Section 10.5.3.2.2, “Introduction of the two Command Sequence Lists (CSLs)
and
