Freescale Semiconductor MC9S12ZVHL32, Reference Manual

Page: 838 / 874

Appendix P Detailed Register Address Map
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor 839
0x0070–0x00FF Memory Map Control Module(MMC)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0070 MODE R
MODC
0 0 0 0 0 0 0
W
0x0071-
0x007F
Reserved R 0 0 0 0 0 0 0 0
W
0x0080 MMCECH R
ITR[3:0] TGT[2:0]
W
0x0081 MMCECL R
ACC[3:0] ERR[3:0]
W
0x0082 MMCCCRH R CPUU 0 0 0 0 0 0 0
W
0x0083 MMCCCRL R 0 CPUX 0 CPUI 0 0 0 0
W
0x0084 Reserved R 0 0 0 0 0 0 0 0
W
0x0085 MMCPCH R CPUPC[23:16]
W
0x0086 MMCPCM R CPUPC[15:8]
W
0x0087 MMCPCL R CPUPC[7:0]
W
0x0088-
0x00FF
Reserved R 0 0 0 0 0 0 0 0
W
0x0100–0x017F Debug Module (DBG)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0100 DBGC1
R
ARM
0
reserved BDMBP
BRKCPU
reserved EEVE
W TRIG
0x0101 DBGC2
R 0 0 0 0
CDCM ABCM
W
0x0102 DBGTCRH
R
reserved TSOURCE TRANGE TRCMOD TALIGN
W
0x0103 DBGTCRL
R 0 0 0 0
DSTAMP PDOE PROFILE STAMP
W
0x0104 DBGTB
R Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
W