Chapter 1 Device Overview MC9S12ZVHY/MC9S12ZVHL Families
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
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Freescale Semiconductor
1.20
LCD Clock Source Connectivity
The LCD’s clock is connected to the RTC’s RTCCLK output. User need to set the RTCCTL2[RTCPS] in
Section 18.4.2, “RTC Control Register 2 (RTCCTL2)”
to get the expect RTCCLK frequency if it uses the
main OSC as clock source.
1.21
32K OSC enable control
The 32K OSC enable is controlled by the RTCCTL2[CLKSRC] in
Section 18.4.2, “RTC Control Register
. Setting the bits to 2’b01 enable the 32K OSC, it also selects the 32K OSC as the source
for LCD and RTC clock. RTCCTL2 is write one time only in NSC mode, once enable the 32K OSC, it will
be not able to switch off.
