Chapter 6 S12Z Debug (S12ZDBGV2) Module
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
204
Freescale Semiconductor
Write: If DBG not armed and PTACT is clear.
This register can be accessed with a byte resolution, whereby DBGCDM0, DBGCDM1, DBGCDM2,
DBGCDM3 map to DBGCDM[31:0] respectively.
XGATE data accesses have a maximum width of 16-bits and are mapped to DBGCDM[15:0].
6.3.2.22
Debug Comparator D Control Register (DBGDCTL)
Read: Anytime.
Write: If DBG not armed and PTACT is clear.
Table 6-37. DBGCDM Field Descriptions
Field
Description
31–16
Bits[31:16]
(DBGCDM0,
DBGCDM1)
Comparator Data Mask Bits
— These bits control whether the comparator compares the data bus bits to the
corresponding comparator data compare bits.
0 Do not compare corresponding data bit
1 Compare corresponding data bit
15–0
Bits[15:0]
(DBGCDM2,
DBGCDM3)
Comparator Data Mask Bits
— These bits control whether the comparator compares the data bus bits to the
corresponding comparator data compare bits.
0 Do not compare corresponding data bit
1 Compare corresponding data bit
Address: 0x0140
7
6
5
4
3
2
1
0
R
0
0
INST
0
RW
RWE
reserved
COMPE
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 6-24. Debug Comparator D Control Register
Table 6-38. DBGDCTL Field Descriptions
Field
(1)
Description
5
INST
Instruction Select
— This bit configures the comparator to compare PC or data access addresses.
0 Comparator compares addresses of data accesses
1 Comparator compares PC address
3
RW
Read/Write Comparator Value Bit
— The RW bit controls whether read or write is used in compare for the
associated comparator. The RW bit is ignored if RWE is clear or INST is set.
0 Write cycle is matched
1 Read cycle is matched
2
RWE
Read/Write Enable Bit
— The RWE bit controls whether read or write comparison is enabled for the
associated comparator. This bit is ignored if INST is set.
0 Read/Write is not used in comparison
1 Read/Write is used in comparison
0
COMPE
Enable Bit
— Determines if comparator is enabled
0 The comparator is not enabled
1 The comparator is enabled