Freescale Semiconductor MC9S12ZVHL32, Reference Manual

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Chapter 1 Device Overview MC9S12ZVHY/MC9S12ZVHL Families
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
44 Freescale Semiconductor
1.7.2.30.2 M1COSM, M1COSP, M1SINM and M1SINP Signals
These signal are used to measure the back EMF to calibrate the pointer reset position which are associated
with SSD[1].
1.7.2.31 Interrupt Signals
— IRQ and XIRQ
IRQ is a maskable level or falling edge sensitive input. XIRQ is a non-maskable level-sensitive interrupt.
1.7.2.32 Oscillator and Clock Signals
1.7.2.32.1 4-20MHz main Oscillator Pins — EXTAL and XTAL
EXTAL and XTAL are the crystal driver. On reset, the OSC is not enabled, all the device clocks are derived
from the internal reference clock. EXTAL is the oscillator input. XTAL is the oscillator output.
1.7.2.32.2 32.768kHz Oscillator Pins — 32K_EXTAL and 32K_XTAL
32K_EXTAL and 32K_XTAL are the 32.768KHZ crystal driver. On reset the OSC is not enabled.
32K_EXTAL is the oscillator input. 32K_XTAL is the oscillator output.
Figure 1-3 is the 32K OSC
connection diagram. Refer to the Appendix Table K-1., “OSC32K DC Electrical Specifications for the C
x
,
C
y
and R
F
requirement. Both RTC and LCD clock source can from the 32K OSC. The OSC enable control
is from the RTC. If the RTCCTL2[CLKSRC] is set, then it will enable the 32K OSC. After enable the OSC,
it needs to wait enough time before enable the RTC and LCD. Refer to
Appendix Table K-2., “OSC32K
Frequency Specifications for the startup time requirement.
Figure 1-3. 32K OSC Crystal/Resonator Connection
32K OSC
32K_XTAL 32K_EXTAL
C
x
C
y
Crystal or Resonator
R
F
R
s