Register Map
13-12
13.2.2.1
Setup FIFO Select (Setup_Sel)
Set by the local host in response to a setup general USB interrupt in order to
access the EP0 read-only setup FIFO when reading the DATA register. Setting
this bit clears the Setup interrupt bit. When this bit is set, other EP_NUM
register bits must be 0.
After having read the setup FIFO, the local host must clear this bit by
writing a 0 to it.
0: No access
1: Access permitted
USB reset value: 0
Local hos reset value: 0
13.2.2.2
TX/RX FIFO Select (EP_Sel)
Set by the local host to access the status (STAT_FLG, RXFSTAT) and data
(DATA) registers for the endpoint selected. If EP_Dir bit is set to 0, the local
host can read data from endpoint RX FIFO by reading the DATA register; if
EP_Dir bit is set to 1, the local host can write data into endpoint TX FIFO by
writing into the DATA register. After each access to an endpoint during interrupt
handling, the local host must clear this bit.
Before the local host sets this bit, it must set Setup_Sel bit to 0. After
having accessed the endpoint FIFO either for read or for write access the
local host must clear this bit by writing a 0 to it.
0: No access
1: Access permitted
Value after local host or USB reset is low.
