USB Transactions
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13.3.1.1
Non-Isochronous, Non-Control OUT Endpoint Handshaking Conditions
The Set_FIFO_En bit provides the main control for the ability to allow success-
ful OUT transaction data reception for the endpoint. If at the beginning of an
OUT transaction to an endpoint the FIFO_En bit is 1, the USB module is al-
lowed to accept the OUT transaction data to the RX FIFO and, when the trans-
action completes, the USB module can return ACK to the USB host to indicate
that the data was received correctly (this is the top case shown in Figure 13–3).
If, however, the FIFO_En bit was 0 at the beginning of an OUT transaction to
the endpoint, the USB module returns NAK during the handshake phase to
indicate that the endpoint did not accept the data (the second case shown in
Figure 13–3).
It is important to note that the USB host need not send a whole RX FIFO worth
of data to the endpoint during an OUT transaction. In this case, the RX FIFO
is not full when the endpoint RX interrupt is generated. The local host code
must be careful not to read too much data. Local host code must read the
RXF_Count value before reading data from the RX FIFO.
After a USB OUT transaction to an endpoint where the data is accepted
(ACKed), the hardware clears the endpoint’s FIFO_En bit. Once the local host
software has dealt with the OUT transaction data in the endpoint RX FIFO, it
must re-enable the endpoint OUT transaction reception by setting the
Set_FIFO_En bit. Local host software can use the Set_FIFO_En bit as a
receive flow control mechanism.
Acknowledged Transactions (ACK)
At completion of an OUT transaction to an endpoint, the USB module issues
an endpoint-specific interrupt to the local host and the STAT_FLG is updated.
In response to the endpoint interrupt, the local host must read EPN_STAT reg-
ister to identify the endpoint causing the interrupt, then write a 1 to the interrupt
bit to clear it. The local host must set EP_Num to the endpoint number and
EP_Sel to 1, then read the endpoint status. The ACK bit is set to indicate that
the endpoint received a transaction to which the USB module signaled ACK
handshaking.
If the FIFO_Empty is cleared, the host sent 1 or more bytes of data (but less
than or equal to the physical size of the endpoint RX FIFO) and the data is in
the endpoint RX FIFO. The local host knows the number of bytes to read from
RX FIFO by reading the RXF_Count value. The local host can then read RX
data from DATA register. Once the local host has read the data from the FIFO,
it sets the Set_FIFO_En bit to allow the next USB OUT transaction to the end-
point to be placed into the RX FIFO and then clears the EP_Sel bit. This clears
the ACK bit for this endpoint and allows the next transaction status to be written
to the STAT_FLG register.
