Register Map
13-18
Table 13–6. Status Register (STAT_FLG) (Continued)
Bit
Description
Name
3
ACK
Transaction acknowledge (non-isochronous)
2
FIFO_En
FIFO enable status (non-isochronous)
1
Non_ISO_FIFO_Empty
Non-isochronous FIFO empty
0
Non_ISO_FIFO_Full
Non-isochronous FIFO full
13.2.5.1
Isochronous Missed IN Token (Miss_In)
Only concerns isochronous IN endpoints.
Notifies the local host that the core missed a valid isochronous IN token during
previous frame and that TX data was flushed from the FIFO instead of being
transmitted to the USB host. This bit is updated on a start of frame (SOF).
0: The endpoint received an IN token the previous frame.
1: The endpoint did not receive an IN token the previous frame and TX data
was flushed.
Value after local host or USB reset is low.
13.2.5.2
Isochronous Receive Data Flush (Data_Flush)
Only concerns isochronous OUT endpoints.
When set, this bit indicates that data was flushed from the isochronous FIFO
that was moved from the foreground to the background. This happens when
the local host does not read all of the data from the foreground FIFO in a frame.
This bit is updated every frame.
0: Not significant
1: Data was flushed
Value after local host or USB reset is low.
13.2.5.3
Isochronous Receive Data Error (ISO_Err)
Only concerns isochronous OUT endpoints.
When set, this bit indicates that the isochronous data packet was received
incorrectly. This happens when the core detects an error in the data packet
(CRC, bit stuffing, PID check) or when there is an overrun condition in the
FIFO. When this bit is set, the FIFO contents are automatically flushed by the
core and the FIFO status is empty.
