HDQ and 1-Wire Protocols
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5) Software must read the interrupt status register, to determine if RX was
complete or whether there was a time-out.
6) Software does a read of the RX buffer register to retrieve the read data
from slave.
7) Repeat for each successive byte.
In HDQ mode, the address/command is only written once to the slave. Howev-
er, after the first byte is received, if an RX complete interrupt is received, the
software must initiate the read of the second byte by writing the go bit of the
control and status register. The first byte that was received is shadowed and
provided to the software, while the hardware is fetching the second byte of
data.
1-Wire Mode
This section highlights the primary differences between the HDQ and the
1-Wire protocols.
In the 1-Wire mode, the firmware must send an initialization pulse to the multi-
ple slaves that can be connected on the interface. If any slave is present, the
slave responds with a presence pulse.
The initialization pulse is sent by setting the INIT bit and the GO bit in the con-
trol and status register. A presence detect is indicated in the appropriate bit of
the register. If no presence is received, then a time-out bit is set in the status
register. The initialization bit is cleared at the end of the initialization pulse.
Also, the presence detect and the time-out bits are cleared at the end of the
initialization pulse, if a presence detect is received. The time-out bit has no
other significance in this mode; that is, unlike in HDQ mode, it is always cleared
during a read operation.
1-Wire mode is a bit-by-bit protocol for a read. Unlike HDQ, which sends eight
bits of data on a read, the slave must be clocked by the host in 1-Wire protocol
for each bit. At the end of the command/address byte, the line is pulled high
and the host creates a low-going edge to initiate a bit read from the slave. The
host then pulls the line high, and the slave either pulls the line low to indicate
a 0 or does not drive the line to indicate a 1. The host repeats the operation
for the next bit that need to be read.
The first bit that is received is the LSB and the last bit is the MSB in the RX data
register.
