Power Management
15-22
Figure 15–10. Power Management State Machine
Chip IDLE
request
Awake mode
– 12-MHz, 32-kHz clocks, and DPLLs 1 are on
(DPLL can be bypassed if desired).
– Internal 12-MHz clock, CK_REF, is on.
– If a 48-MHz clock is requested, it is generated by
ULPD DPLL or APLL.
– If an external 12-MHz clock is requested, it is
enabled.
Big sleep mode
– 12-MHz and 32-kHz clocks are on
– DPLLs 1 are off
– Internal 12-MHz clock, CK_REF, is off
– If a 48-MHz clock is requested, it is generated by
ULPD DPLL or APLL
– If an external 12-MHz clock is requested, it is
enabled
Deep sleep mode
– 32-kHz clock is on
– 12-MHz and PLLs are off
– Internal 12-MHz clock, CK_REF, is off
– No 48-MHz or external 12-MHz clocks
Wait for
12-MHz clock to
be stable.
PWRON_RESET
(power-on reset)
Wake-up request
No request for
48-MHz or
12-MHz clock
12-MHz clock is
stable
Wake-up
request,
48-MHz clock
request, or
external request
for 12-MHz clock
List of peripherals that requests 48-MHz
from ULPD DPLL or APLL:
– USB host and client
– Camera
– UART1,2,3
– MMC
– External modem
