General-Purpose I/O
10-9
MPU/DSP Shared Peripherals
The data input register is used to register the data that is read from the GPIO
input pins. The input data is captured synchronously and clocked by an internal
peripheral clock. The data input register is a read-only register. The GPIO input
data is captured into this register three clock cycles after the GPIO input pin(s)
change for synchronization and debouncing used to remove any input
glitches. Bits not configured as input are undefined during read back. Both the
MPU and DSP have read access to this register, but each processor only has
read access to the individual bits controlled by that processor.
In the registers described in Table 10–4 through Table 10–8, both the MPU
and the DSP have read/write access to only the bits they control within a regis-
ter (bits associated with GPIO they control). The MPU (DSP) can write values
to the bits not controlled by the MPU (DSP), but the written value is not valid
and does not affect the configuration of the associated GPIO.
Table 10–3. Data Input Register (DATA_INPUT_REG)
Bit
Function
Access
(R/W)
Reset
Value
15–0
Receive data
R
0x0000
The data output register is used for setting the state on the GPIO output pins.
Table 10–4. Data Output Register (DATA_OUTPUT_REG)
Bit
Function
Access
(R/W)
Reset
Value
15–0
Data to transmit
R/W
0xFFFF
The direction control register is used to configure the GPIO pins for either input
or output. At reset, all of the GPIO pins are configured as inputs.
Table 10–5. Direction Control Register (DIRECTION_CONTROL_REG)
Bit
Value
Function
Access
(R/W)
Reset
Value
15–0
0
Output
R/W
0xFFFF
1
Input
