Inter-Integrated Circuit Controller
7-62
out on the data line SDA in synchronism with the clock pulses that are gener-
ated by the master device. It does not generate the clock, but it can hold the
clock line SCL low while intervention of the local host is required.
Slave Receiver
In this mode serial data bits received on the bus line SDA are shifted-in
synchronously with the clock pulses on SCL, which are generated by the
master device. It does not generate the clock, but it can hold the clock line SCL
low while intervention of the local host is required following the reception of a
byte.
Arbitration
If two or more master transmitters start a transmission on the same bus almost
simultaneously, arbitration procedure is invoked. The arbitration procedure
uses the data presented on the serial bus by the competing transmitters. When
a transmitter senses that a high signal it has presented on the bus has been
overruled by a low signal, it switches to the slave receiver mode. Figure 7–28
shows the arbitration procedure between two devices. The arbitration proce-
dure gives priority to the device that transmits the serial data stream with the
lowest binary value. If two or more devices send identical first bytes, arbitration
continues on the subsequent bytes.
Figure 7–28. Arbitration Procedure Between Two Master Transmitters
Device #1 loses arbitration and
switches off.
1
0
1
0
0
1
0
1
1
0
0
1
0
1
1
Bus line
SCL
Data from
device #1
Data from
device #2
Bus line
SDA
