Clock Generation
15-11
Clock Generation and System Reset Management
2) DSP_MMU clock must be 1x or 1/2x of DSP clocks.
3) DSPMMU_DIV can be /1, /2, /4, /8, but TC_DIV and DSP_DIV must obey
1 and 2.
4) DSP_MMU clock frequency cannot be more than the maximum speed of
the TC.
15.2.3 External Master Mode
This mode allows bypass of the 12-Mhz on-chip oscillator in systems where
the 12-MHz clock is provided externally by a master device. The procedure for
utilizing this mode is as follows:
1) During power-on reset, OMAP5910 is in deep sleep:
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12-MHz on-chip oscillator is disabled.
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MCLKREQ pin is an input.
2) After power-on reset, OMAP5910 is awake.
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12-MHz oscillator is bypassed.
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MCLKREQ pin is an input.
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12-Mhz clock is provided externally.
3) Switch to external master mode by setting (FUNC_MUX_CTRL_B(20:18)
= 001.
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The 12-MHz oscillator is bypassed (disabled).
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MCLKREQ pin is now the EXT_MASTER_REQ pin, which drives to 1.
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12-Mhz clock is provided externally.
4) If OMAP switches into deep sleep:
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EXT_MASTER_REQ drives to 0 to indicate that the external 12-MHz
clock is not needed.
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The 12-MHz clock can then switch off externally.
