Texas Instruments OMAP5910, Technical Reference Manual

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OMAP5910 Local Bus MMU
14-111 Universal Serial Bus Host
The LB MMU global flush register allows flushing of all nonprotected TLB
entries.
Note:
Flushing the whole TLB does not change the base_value or the
victim_counter fields of the LB_MMU_LOCK_REG register.
Table 14–63. Local Bus MMU Global Flush Register
Access
Hardware
Reset
Bit Name Function
User Sup
Reset
Value
15–1 Reserved Reserved – – –
0 Global_flush When written with a 1, all nonprotected
TLB entries are flushed. Has no effect
when written with a 0. Always returns 0
on read. R/W R/W 0
The LB MMU entry flush register allows flushing of individual local bus MMU
TLB entries.
Table 14–64. Local Bus MMU Entry Flush Register
Access
Hardware
Reset
Bit Name Function
User Sup
Reset
Value
15–1 Reserved Reserved – – –
0 flush_entry When written with a 1, flushes the TLB
entry pointed to by the virtual address
in LB_MMU_CAM_H_REG and
LB_MMU_CAM_L_REG, even if the
entry is set as a protected entry. Has
no effect when written with a 0. Always
reads as 0. R/W R/W 0