Register Map
13-34
13.2.12.5
OUT Transaction Endpoint n Interrupt Flag (EPn_RX)
Only concerns non-isochronous endpoints.
This bit is automatically set by the core when a handshake sequence occurs
for an OUT transaction to an interrupt of bulk endpoint (NAK with the Nak_En
bit set, ACK, or STALL). The local host must read EPN_STAT register to identi-
fy the endpoint causing the interrupt.
0: No action
1: OUT transaction detected on an endpoint.
Value after local host or USB reset is low.
13.2.12.6
IN Transaction Endpoint n Interrupt Flag (EPn_TX)
Only concerns non-isochronous endpoints.
This bit is automatically set by the core when a handshake sequence occurs
for an IN transaction to an interrupt of bulk endpoint (NAK with the Nak_En bit
set, ACK or STALL). The local host must read EPN_STAT register to identify
the endpoint causing the interrupt.
0: No action
1: IN transaction detected on an endpoint.
Value after local host or USB reset is low.
13.2.12.7
Device State Changed Interrupt Flag (DS_Chg)
This bit is automatically set by the core when the state of the device changes.
This is when the core modifies any of the bits present in the DEVSTAT register.
When this bit is cleared, the background DEVSTAT register moves into fore-
ground position.
0: No action
1: Device state change detected
Value after local host reset is low and after USB reset is high.
13.2.12.8
Setup Transaction Interrupt Flag (Setup)
This bit is automatically set by the core when a valid setup transaction com-
pletes one control endpoint for a non-autodecoded control request and is
cleared automatically by the core when the local host sets the Setup_Sel bit
when reading setup data. A write of 1 to it has no effect.
0: No action
1: Valid setup transaction occurred on endpoint 0.
Value after local host or USB reset is low.
