Protocol analysis
R&S
®
RTO6
941
User Manual 1801.6687.02 ─ 05
clock signal matches the frequency and is aligned to the phase of the data stream. The
recovered clock can be used to sample the data stream and to obtain the sequence of
transmitted bits.
Access: [Bus] > "Setup" tab > "Protocol = PCIe" = "Generation = Gen1/Gen2" > "DSP"
tab
Nominal bit rate
Sets the quiescent frequency of the PLL. It corresponds to the data rate of the data
stream from which the clock is to be recovered.
Remote command:
PLL settings
Phase-locked loop parameters are listed below.
Note
: Nomial bit rate, bandwidth and relative bandwidth are interacting settings. Modi-
fying one parameter also changes one of the dependent parameters.
"Order"
Sets the order of the PLL: first or second order. PLL of higher order
can compensate for more complex jitter behavior.
"Bandwidth"
Sets the PLL bandwidth. It defines the part of the spectrum that the
PLL can follow during synchronization. The PLL bandwidth is usually
defined by the transmission standard.
"Rel. band-
width"
Sets the relative bandwidth, that is the ratio of the nominal bit rate to
the PLL bandwidth.
PCIe (option R&S
RTO6-K72)
