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Remote control commands
R&S
®
RTO6
2577
User Manual 1801.6687.02 ─ 05
STATus:QUEStionable:LIMit:NTRansition
<Value>
STATus:QUEStionable:MARGin:NTRansition
<Value>
STATus:QUEStionable:FREQuency:NTRansition
<Value>
STATus:QUEStionable:DEEMbedding:NTRansition
<Value>
STATus:QUEStionable:LAMPlitude:NTRansition
<Value>
STATus:QUEStionable:ZVCoverload:NTRansition
<Value>
STATus:QUEStionable:MASK:NTRansition
<Value>
Sets the negative transition filter. If a bit is set, a 1 to 0 transition in the corresponding
bit of the condition register causes a 1 to be written in the corresponding bit of the
event register.
Parameters:
<Value>
Bit mask in decimal representation
Example:
STATus:QUEStionable:MASK:NTRansition 24
Set bits no. 3 and 4 of the STATus:QUEStionable:MASK:NTRan-
sition register part:
24 = 8 + 16 = 2
3
+ 2
4
STATus:QUEStionable:COVerload:PTRansition
<Value>
STATus:QUEStionable:TEMPerature:PTRansition
<Value>
STATus:QUEStionable:ADCState:PTRansition
<Value>
STATus:QUEStionable:LIMit:PTRansition
<Value>
STATus:QUEStionable:MARGin:PTRansition
<Value>
STATus:QUEStionable:FREQuency:PTRansition
<Value>
STATus:QUEStionable:DEEMbedding:PTRansition
<Value>
STATus:QUEStionable:LAMPlitude:PTRansition
<Value>
STATus:QUEStionable:ZVCoverload:PTRansition
<Value>
STATus:QUEStionable:MASK:PTRansition
<Value>
Sets the positive transition filter. If a bit is set, a 0 to 1 transition in the corresponding
bit of the condition register causes a 1 to be written in the corresponding bit of the
event register.
Parameters:
<Value>
Bit mask in decimal representation
Example:
STATus:QUEStionable:MASK:PTRansition 24
Set bits no. 3 and 4 of the STATus:QUEStionable:MASK:PTRan-
sition register part:
24 = 8 + 16 = 2
3
+ 2
4
MTESt:SBITnumber?
<MaskTestName>
Returns the number of the status bit that belongs to the indicated mask test in the
STATus:QUEStionable:MASK
register. The status bits are assigned in the order of
mask creation.
Query parameters:
<MaskTestName>
String with the name of the mask test
Status reporting