TC1784
Direct Memory Access Controller (DMA)
User´s Manual
11-75
V1.1, 2011-05
DMA, V3.03
IPM0n
(n = 0-7)
16+n
rh
Pattern Detection from Channel 0n
This bit indicates that a pattern has been detected for
channel 0n while the pattern detection has been
enabled. This bit (and ICH0n) is reset by software
when writing a 1 to INTCR.CICH0n or by a channel
reset (writing CHRSTR.CH0n = 1).
0
B
A pattern has not been detected.
1
B
A pattern has been detected.
IPM1n
(n = 0-7)
24+n
rh
Pattern Detection from Channel 1n
This bit indicates that a pattern has been detected for
channel 1n while the pattern detection has been
enabled. This bit (and ICH1n) is reset by software
when writing a 1 to INTCR.CICH1n or by a channel
reset (writing CHRSTR.CH1n = 1).
0
B
A pattern has not been detected.
1
B
A pattern has been detected.
Field
Bits
Type Description
Summary of Contents for TC1784
Page 1: ...User s Manual V1 1 2011 05 Microcontrollers TC1784 32 Bit Single Chip Microcontroller ...
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Page 950: ...TC1784 Direct Memory Access Controller DMA User s Manual 11 132 V1 1 2011 05 DMA V3 03 ...
Page 1949: ...TC1784 General Purpose Timer Array GPTA v5 User s Manual 21 297 V1 1 2011 05 GPTA v5 V1 14 ...
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