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TC1784
System Timer (STM)
User´s Manual
14-9
V1.1, 2011-05
STM, V1.41
14.3.1
Clock Control Register
The STM clock control register is used to switch the STM on or off and to control its input
clock rate. After a power-on reset, the STM is always enabled and starts counting. The
STM can be disabled by setting bit DISR to 1.
STM_CLC
STM Clock Control Register
(00
H
)
Reset Value: 0000 0200
H
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
r
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
RMC
0
FS
OE
SB
WE
E
DIS
SP
EN
DIS
S
DIS
R
r
rw
r
rw
w
rw
rw
r
rw
Field
Bits
Type Description
DISR
0
rw
Module Disable Request Bit
Used for enable/disable control of the STM module.
0
B
No disable requested
1
B
Disable requested
DISS
1
r
Module Disable Status Bit
Bit indicates the current status of the STM module.
0
B
STM module is enabled
1
B
STM module is disabled
SPEN
2
rw
Module Suspend Enable for OCDS
Used for enabling the suspend mode.
EDIS
3
rw
Sleep Mode Enable Control
Used for module sleep mode control.
SBWE
4
w
Module Suspend Bit Write Enable for OCDS
Determines whether SPEN and FSOE are write-
protected.
FSOE
5
rw
Fast Switch Off Enable
Used for fast clock switch off in OCDS suspend mode.
Summary of Contents for TC1784
Page 1: ...User s Manual V1 1 2011 05 Microcontrollers TC1784 32 Bit Single Chip Microcontroller ...
Page 3: ...User s Manual V1 1 2011 05 Microcontrollers TC1784 32 Bit Single Chip Microcontroller ...
Page 950: ...TC1784 Direct Memory Access Controller DMA User s Manual 11 132 V1 1 2011 05 DMA V3 03 ...
Page 1949: ...TC1784 General Purpose Timer Array GPTA v5 User s Manual 21 297 V1 1 2011 05 GPTA v5 V1 14 ...
Page 2350: ...w w w i n f i n e o n c o m Published by Infineon Technologies AG Doc_Number ...