Infineon Technologies TC1784, User Manual

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TC1784
Analog to Digital Converter (ADC)
User´s Manual 23-12 V1.1, 2011-05
ADC, V1.3
a fast external blocking capacitor C
EXT
at the analog input pin of the ADC. Like this,
mainly C
EXT
delivers the charge during the sample phase. This structure allows a
significantly shorter sample phase than without a blocking capacitor, because the low-
pass time constant defining the sample time is mainly given by the values of R
AIN
and
C
AIN
.
Additionally, the capacitor C
AIN
is automatically precharged to a voltage of approximately
the half of the standard reference voltage V
AREF
to minimize the average difference
between V
AINx
and V
C
at the beginning of a sample phase. Due to varying parameters
and parasitic effects, the precharge voltage of C
AIN
is typically smaller than V
AREF
/ 2.
On the other hand, the charge redistribution between C
EXT
and C
AIN
leads to a voltage
change of V
AINx
during the sample phase. In order to keep this voltage change lower than
1 LSB
n
, it is recommended to use an external blocking capacitor C
EXT
in the range of at
least 2
n ×
C
AIN
.
The resulting low-pass filter of R
EXT
and C
EXT
should be dimensioned in a way to allow
V
AINx
to follow V
S
between two sample phases of the same analog input channel.
Please note that, especially at high temperatures, the analog input structure of an ADC
can lead to a leakage current and introduces an error due to a voltage drop over R
EXT
.
The ADC input leakage current increases if the input voltage level is close to the analog
supply ground V
SSM
or to the analog power supply V
DDM
. It is recommended to use an
operating range for the input voltage between approximately 3% and 97% of V
DDM
to
reduce input leakage values.
Furthermore, the leakage is influenced by an overload condition at adjacent analog
inputs. During an overload condition, an input voltage exceeding the supply range is
applied at an input and the built-in protection circuit limits the resulting input voltage. This
leads to an overload current through the protection circuit that is translated (by a coupling
factor) into an additional leakage at adjacent inputs.
23.1.8.2 Reference Path
During the conversion phase, parts of the capacitor field C
AIN
are switched to a reference
input or to V
AGND
. The ADC kernel supports two possible reference inputs, V
AREF
as
standard reference and CH0 as alternative reference. The reference selection between
both possibilities is handled individually for each analog input channel. For example, this
structure allows conversions of 5 V and 3.3 V based analog input signals with the same
ADC kernel.
A high accuracy of the conversion results requires a stable and noise-free reference
voltage and analog supply voltages during the conversion phase. Instable voltages or
noise on the supply or reference inputs lead to a reduced conversion accuracy. Please
note that noise can also be introduced into the ADC module by other modules, e.g. by
switching of neighboring pins. It is strongly recommended to carefully decouple analog
from digital signal domains.
Due to the switching of parts of C
AIN
, the ADC requires a dynamic current at the selected
reference input. Thus, the impedance R
AREF
of the reference voltage source V
R
has to