Infineon Technologies TC1784, User Manual

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TC1784
Synchronous Serial Interface (SSC)
User´s Manual 17-59 V1.1, 2011-05
SSC, V1.5
17.3.5 Address Map of the SSC Modules
An absolute register address is given by the offset address of the register (given in
Table 17-4 ) plus the module base address (given in Table 17-3 ).
Table 17-7 Address Map of SSC0/SSC1/SSC2
Short Name Description Address Access Mode Reset Value
Read
Write
Synchronous Serial Interface 0 (SSC0)
SSC0_
CLC SSC0 Clock Control
Register F010 0100
H
U, SV SV, E 0000 0003
H
SSC0_
PISEL SSC0 Port Input Select
Register F010 0104
H
U, SV U, SV 0000 0000
H
SSC0_
ID SSC0 Module
Identification Register F010 0108
H
U, SV BE 0000 45XX
H
SSC0_
FDR SSC0 Fractional Divider
Register F010 010C
H
U, SV SV, E 1000 0000
H
SSC0_CON SSC0 Control Register F010 0110
H
U, SV U, SV 0000 0000
H
SSC0_
BR SSC0 Baud Rate Timer
Reload Register F010 0114
H
U, SV U, SV 0000 0000
H
SSC0_
SSOC SSC0 Slave Select Output
Control Register F010 0118
H
U, SV U, SV 0000 0000
H
SSC0_
SSOTC SSC0 Slave Select Output
Timing Control Register F010 011C
H
U, SV U, SV 0000 0000
H
SSC0_
TB SSC0 Transmit Buffer
Register F010 0120
H
U, SV U, SV 0000 0000
H
SSC0_
RB SSC0 Receive Buffer
Register F010 0124
H
U, SV U, SV 0000 0000
H
SSC0_
STAT SSC0 Status Register F010 0128
H
U, SV U, SV 0000 0000
H
SSC0_
EFM SSC0 Error Flag
Modification Register F010 012C
H
U, SV U, SV 0000 0000
H
– Reserved F010 0130
H
-
F010 01F0
H
BE BE –
SSC0_
TSRC SSC0 Transmit Interrupt
Service Req. Control Reg. F010 01F4
H
U, SV SV 0000 0000
H