Infineon Technologies TC1784, User Manual

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TC1784
Synchronous Serial Interface (SSC)
User´s Manual 17-39 V1.1, 2011-05
SSC, V1.5
The Slave Select Output Timing Control Register controls the operation of the Slave
Select Output Generation Unit.
SSOTC
Slave Select Output Timing Control Register
(1C
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
EN
QSM
EN
0
SLS
O7
MOD
0 INACT TRAIL LEAD
rw w r rw r rw rw rw
Field Bits Type Description
LEAD [1:0] rw Slave Output Select Leading Delay
This bit field determines the number of leading delay
clock cycles. A leading delay clock cycle is always a
multiple of an SCLK shift clock period.
00
B
Zero leading delay clock cycle selected
1)
01
B
One leading delay clock cycle selected
10
B
Two leading delay clock cycles selected
11
B
Three leading delay clock cycles selected
TRAIL [3:2] rw Slave Output Select Trailing Delay
This bit field determines the number of trailing delay
clock cycles. A trailing delay clock cycle is always a
multiple of an SCLK shift clock period.
00
B
Zero trailing delay clock cycle selected
1)
01
B
One trailing delay clock cycle selected
10
B
Two trailing delay clock cycles selected
11
B
Three trailing delay clock cycles selected