Infineon Technologies TC1784, User Manual

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TC1784
Micro Link Interface (MLI)
User´s Manual 22-151 V1.1, 2011-05
MLI, V2.0
22.5.15 MLI0 Address Map
An absolute register address is given by the offset address of the register (given in
Table 22-10 ) plus the module base address (given in Table 22-9 ).
Table 22-17 Address Map of MLI0
Short Name Description
Address Access Mode Reset Value
Read
Write
Multi Link Interface 0 (MLI0)
– Reserved F010 C000
H
nBE SV, E –
– Reserved F010 C004
H
nBE nBE –
MLI0_
ID MLI0 Module Identification
Register F010 C008
H
U, SV BE 0025 C0XX
H
MLI0_
FDR MLI0 Fractional Divider
Register F010 C00C
H
U, SV SV, E 03FF 43FF
H
MLI0_
TCR MLI0 Transmitter Control
Register F010 C010
H
U, SV U, SV 0000 0110
H
MLI0_
TSTATR MLI0 Transmitter Status
Register F010 C014
H
U, SV BE 0000 0000
H
MLI0_
TP0STATR MLI0 Transmitter Pipe 0
Status Register F010 C018
H
U, SV BE 0000 0000
H
MLI0_
TP1STATR MLI0 Transmitter Pipe 1
Status Register F010 C01C
H
U, SV BE 0000 0000
H
MLI0_
TP2STATR MLI0 Transmitter Pipe 2
Status Register F010 C020
H
U, SV BE 0000 0000
H
MLI0_
TP3STATR MLI0 Transmitter Pipe 3
Status Register F010 C024
H
U, SV BE 0000 0000
H
MLI0_
TCMDR MLI0 Transmitter
Command Register F010 C028
H
U, SV U, SV 0000 0000
H
MLI0_
TRSTATR MLI0 Transmitter
Registers Status Register F010 C02C
H
U, SV BE 0000 0000
H
MLI0_
TP0AOFR MLI0 Transmitter Pipe 0
Address Offset Register F010 C030
H
U, SV BE 0000 0000
H
MLI0_
TP1AOFR MLI0 Transmitter Pipe 1
Address Offset Register F010 C034
H
U, SV BE 0000 0000
H
MLI0_
TP2AOFR MLI0 Transmitter Pipe 2
Address Offset Register F010 C038
H
U, SV BE 0000 0000
H