Infineon Technologies TC1784, User Manual

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TC1784
General Purpose Timer Array (GPTA
®
v5)
User´s Manual 21-274 V1.1, 2011-05
GPTA
®
v5, V1.14
Table 21-26 IOCR Assignment for GPTA
®
v5 Port Lines
Port Port
Lines
for
GPTA
®
v5
GPTA0 I/O Lines LTCA2 I/O Lines Controlled
by IOCR
Register
Input Output Input Output
Port 0 P0.[3:0] IN[3:0]
1)
IN[59:56]
OUT[3:0]
OUT[59:56] IN[3:0]
1)
OUT[3:0] P0_IOCR0
P0.[7:4] IN[7:4] OUT[7:4]
OUT[63:60] IN[7:4] OUT[7:4] P0_IOCR4
P0.[11:8] IN[11:8] OUT[11:8]
OUT[65:64] IN[9:8]
2)
OUT[11:8] P0_IOCR8
P0.[15:12] IN[15:12] OUT[15:12] OUT[15:12] P0_IOCR12
Port 1 P1.[3:0] IN[19:16] OUT[19:16]
OUT[75:72]
IN[19]
3)
OUT[19:16] P1_IOCR0
P1.[7:4] IN[23:20] OUT[23:20]
OUT[79:76]
IN[23:20] OUT[23:20] P1_IOCR4
P1.[11:8] IN[27:24]
IN[51:48] OUT[27:24]
OUT[51:48] P1_IOCR8
P1.[14:12] IN[18:16] OUT[18:16] P1_IOCR12
Port 2 P2.[3:0] IN[35:32] OUT[35:32] OUT[30:28]
4)
P2_IOCR0
P2.[7:4] IN[39:36] OUT[39:36] OUT[31];
OUT[111:110]
5)
P2_IOCR4
P2.[11:10] IN[11:10] OUT[1:0] P2_IOCR8
P2.[13:12] IN[13:12] OUT[3:2] P2_IOCR12
Port 3 P3.[3:0] OUT[87:84] P3_IOCR0
P3.[7:4] OUT[89:88] P3_IOCR4
P3.[11:8] OUT[93:90] P3_IOCR8
P3.[15:12] OUT[97:94] P3_IOCR12
Port 4 P4.[3:0] IN[31:28]
IN[55:52] OUT[31:28]
OUT[55:52] P4_IOCR0