Infineon Technologies TC1784, User Manual

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TC1784
General Purpose Timer Array (GPTA
®
v5)
User´s Manual 21-229 V1.1, 2011-05
GPTA
®
v5, V1.14
21.5 LTCA Kernel Description
The Local Timer Cell Array (LTCA2) is a unit that contains signal generation cells with
64 Local Timer Cells. These LTCs have identical functionality as the LTCs which are
available in the signal generation cells of the GPTA
®
v5 module.
The Local Timer Cells (LTC00 to LTC62) can be configured to operate in different
modes: Capture Mode, Compare Mode, Free-Running Timer Mode, Reset Timer Mode,
and One Shot Mode. Adjacent cells may be combined to operate on the same pin, thus
generating complex waveforms. One LTC (LTC63) can be used for special compare
modes.
Figure 21-81 Block Diagram of LTCA Unit Kernel
The LTCA Unit Kernel contains Signal Generation Cells that contains all Local Timer
Cells including an I/O Line Sharing Block that controls the LTC connections to the I/O
lines and output lines. I/O lines are supposed to be connected to I/O port lines while the
output lines are typically connected to a MSC interface that is especially able to control
external power devices via a serial connection. The LTCs can be further connected to
input signals of an external clock bus and input lines coming e.g. from other on-chip
peripheral modules.
The clock control cells generates two modules clocks that are required for LTCA
operation. An address decoder generates the select signals for the LTC registers.
Service requests, coming from the LTCs, are able to generate interrupts via the Interrupt
Sharing Block. The interrupts are handled by the external interrupt logic.
MCB05983_LTC32.VSD
Clock
Control
Address
Decoder
f
LTCA2
LTCA Module Kernel
I/O
L
ine S
har
ing B
loc
k
Signal Generation Cells
Local Timer
Cells
LTC[31:00]
f
CLC
Interrupt
Control
SR[07:00]
INT[3:0]
Interrupt Sharing Block
IN[31:00]
OUT[111 :80]
OUT[31:00]
CLK[7:0]