Infineon Technologies TC1784, User Manual

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TC1784
Direct Memory Access Controller (DMA)
User´s Manual 11-66 V1.1, 2011-05
DMA, V3.03
The Enable Error Register describes how the DMA controller reacts to errors. It enables
the interrupts for the loss of a transaction request or Move Engine errors.
DMA_EER
DMA Enable Error Register
(020
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
TRLINP ME1INP ME0INP
E
ME1
DER
E
ME1
SER
E
ME0
DER
E
ME0
SER
rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
E
TRL
17
E
TRL
16
E
TRL
15
E
TRL
14
E
TRL
13
E
TRL
12
E
TRL
11
E
TRL
10
E
TRL
07
E
TRL
06
E
TRL
05
E
TRL
04
E
TRL
03
E
TRL
02
E
TRL
01
E
TRL
00
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Field Bits Type Description
ETRL0n
(n = 0-7) n rw Enable Transaction Request Lost
for DMA Channel 0n
This bit enables the generation of an interrupt when the
set condition for ERRSR.TRL0n is detected.
0
B
The interrupt generation for a request lost event
for channel 0n is disabled.
1
B
The interrupt generation for a request lost event
for channel 0n is enabled.
ETRL1n
(n = 0-7) 8+n rw Enable Transaction Request Lost
for DMA Channel 1n
This bit enables the generation of an interrupt when the
set condition for ERRSR.TRL1n is detected.
0
B
The interrupt generation for a request lost event
for channel 1n is disabled.
1
B
The interrupt generation for a request lost event
for channel 1n is enabled.
EME0SER 16 rw Enable Move Engine 0 Source Error
This bit enables the generation of a Move Engine 0
source error interrupt.
0
B
Move Engine 0 source error interrupt is disabled.
1
B
Move Engine 0 source error interrupt is enabled.