Rohde & Schwarz R&S FSP Series, Operating Manual

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Operating Manual 1164.4556.12 - 06 5.19
R&S FSP Remote Control – Basics
Status Reporting System
5.7.1 Structure of an SCPI Status Register
Each SCPI register consists of 5 parts which each have a width of 16 bits and have
different functions (cf.
Fig. 5.3 ). The individual bits are independent of each other,
i.e. each hardware status is assigned a bit number which is valid for all five parts.
For example, bit 3 of the STATus:OPERation register is assigned to the hardware
status "wait for trigger" in all five parts. Bit 15 (the most significant bit) is set to zero
for all parts. Thus the contents of the register parts can be processed by the control-
ler as positive integer.
Fig. 5.3 The status-register model
CONDition part
The CONDition part is directly written into by the hardware or the sum bit of the next
lower register. Its contents reflects the current instrument status. This register part
can only be read, but not written into or cleared. Its contents is not affected by read-
ing.
PTRansition part
The Positive-TRansition part acts as an edge detector. When a bit of the CONDition
part is changed from 0 to 1, the associated PTR bit decides whether the EVENt bit is
set to 1.
PTR bit =1: the EVENt bit is set.
PTR bit =0: the EVENt bit is not set.
This part can be written into and read at will. Its contents is not affected by reading.
NTRansition part
The Negative-TRansition part also acts as an edge detector. When a bit of the CON-
Dition part is changed from 1 to 0, the associated NTR bit decides whether the
EVENt bit is set to 1.
NTR-Bit = 1: the EVENt bit is set.
NTR-Bit = 0: the EVENt bit is not set.
This part can be written into and read at will. Its contents is not affected by reading.
15 14 13 12 PTRansition part 3 2 1 0
15 14 13 12 EVENt part 3 2 1 0
15 14 13 12 ENABle part 3 2 1 0
& & & & & & & & & & & & & & & &
to higher-order register
Sum bit
& = logical AND
= logical OR
of all bits
+
+
15 14 13 12 NTRansition part 3 2 1 0
15 14 13 12 CONDition part 3 2 1 0