Samsung S3C6400X, User Manual, Page: 927 / 1189

PRELIMINARY
S3C6400X RISC MICROPROCESSOR HSMMC CONTROLLER
27-51
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
ERROR INTERRUPT STATUS REGISTER
Signals defined in this register can be enabled by the Error Interrupt Status Enable register, but not by the Error
Interrupt Signal Enable register. The interrupt is generated when the Error Interrupt Signal Enable is enabled and
at least one of the statuses is set to 1. Writing to 1 clears the bit and writing to 0 keeps the bit unchanged. More
than one status can be cleared at the one register write.
Register Address R/W Description Reset Value
ERRINTSTS0 0x7C200032 ROC/RW1C Error Interrupt Status Register (Channel 0) 0x0
ERRINTSTS1 0x7C300032 ROC/RW1C Error Interrupt Status Register (Channel 1) 0x0
ERRINTSTS2 0x7C400032 ROC/RW1C Error Interrupt Status Register (Channel 2) 0x0
Name Bit Description Initial
Value
[15:9]
Reserved
0
[8]
Auto CMD12 Error
Occurs when detecting that one of the bits in Auto CMD12 Error Status register
has changed from 0 to 1. This bit is set to 1, not only when the errors in Auto
CMD12 occur but also when Auto CMD12 is not executed due to the previous
command error.
‘1’ = Error
‘0’ = No Error
0
[7]
Current Limit Error
Not implemented in this version. Always 0.
0
[6]
Data End Bit Error
Occurs either when detecting 0 at the end bit position of read data which uses
the
DAT line or at the end bit position of the CRC Status.
‘1’ = Error
‘0’ = No Error
0
[5]
Data CRC Error
Occurs when detecting CRC error when transferring read data which uses the
DAT line or when detecting the Write CRC status having a value of other than
"010".
‘1’ = Error
‘0’ = No Error
0
[4]
Data Timeout Error
Occurs when detecting one of following timeout conditions.
(1) Busy timeout for R1b,R5b type
(2) Busy timeout after Write CRC status
(3) Write CRC Status timeout
(4) Read Data timeout.
‘1’ = Timeout
‘0’ = No Error
0
[3]
Command Index Error
Occurs if a Command Index error occurs in the command response.
‘1’ = Error
‘0’ = No Error
0
[2]
Command End Bit Error