PRELIMINARY
MODEM INTERFACE
S3C6400X
RISC MICROPROCESSOR
23-8
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Timing Diagram
XhiADR
XhiCSn
XhiWEn
XhiDATA
t
AVWR
t
CSVWR
t
DHWR
t
WR
t
DSUWR
t
AWR
Figure 23-5 Modem interface write timing diagram
Table 23-2 Modem interface write timing
Parameter
Description
Min (ns)
Max (ns)
Notes
t
AVWR
Address valid to address invalid
16 ns
-
t
CSVWR
Chip select active
16 ns
-
t
AWR
Address valid to write active
4 ns
-
t
WR
Write active
8 ns
-
t
DSUWR
Write data setup
8 ns
-
t
DHWR
Write data hold
4 ns
-