PRELIMINARY
S3C6400X RISC MICROPROCESSOR
KEYPAD INTERFACE
40-9
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
KEYPAD INTERRUPT STATUS AND CLEAR REGISTER
Register
address
R/W
Description
Reset Value
KEYIFSTSCLR 0x7E00A004 R/W KEYPAD
interface status and clear register
0x0
KEYIFSTS
Bit
Description
P_INT [7:0]
KEYPAD input “press” interrupts (falling edge) status(read) and clear(write)
Read : ‘1’=Pressed interrupt occurred,
‘0’=Does not occur
Write : Pressed interrupt is cleared when write data is ‘1’
The P_INT[7:0] indicate that each key pressed from 0 to 7 has a dedicated
interrupt to it from P_INT[0] to P_INT[7]
R_INT [15:8]
KEYPAD input “release” interrupts (rising edge) status(read) and clear(write)
Read : ‘1’=Released interrupt occurred, ‘0’=Does not occur
Write : Released interrupt is cleared when write data is ‘1’
The R_INT[7:0] indicate that each key released from 0 to 7 has a dedicated
interrupt to it from R_INT[0] to R_INT[7]
Reserved [31:16]
-
KEYPAD INTERFACE COLUMN DATA OUTPUT REGISTER
Register
Address
R/W
Description
Reset Value
KEYIFCOL 0x7E00A008 R/W
KEYPAD
interface
column data output register
0x0000FF00
KEYIFCOL
Bit
Description
KEYIFCOL [7:0]
KEYPAD interface column data output register
KEYIFCOLEN [15:8]
KEYPAD interface column data output tri-state enable register
Each bit is for each KEYIFCOL bit.
‘0’= Output pad tri-state buffer enable(Normal output),
‘1’= Output pad Tri-state buffer disable(High-Z output) (@ reset)
Reserved [31:16]
-