PRELIMINARY
S3C6400 RISC MICROPROCESSOR
DMA
11-19
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Software single request register, DMACSoftSReq
The DMACSoftSReq read/write register allows DMA single requests to be generated by software. A DMA request
can be generated for each source by writing a 1 to the corresponding register bit. A register bit is cleared when the
transaction is complete. Writing to this register has no effect.
Reading the register indicates which sources are requesting single DMA transfers. A request can be generated from
either a peripheral or the software request register.
Table 11-11 shows the bit assignment of the DMACSoftSReq register.
Table 11-11. Bit Assignment of DMACSoftSReq register
DMACSoftSReq
Bits
Type
Function
SoftSReq
[15:0]
R/W
Software single request
Note:
It is recommended that software and hardware peripheral requests are not used at the same time.
Software last burst request register, DMACSoftLBReq
The DMACSoftLBReq read/write register allows DMA last burst requests to be generated by software. A DMA
request can be generated for each source by writing a 1 to the corresponding register bit. A register bit is cleared
when the transaction is complete. Writing 0 to this register has no effect.
Reading the register indicates which sources are requesting last burst DMA transfers. A request can be
generated from either a peripheral or the software request register.
Table 11-12 shows the bit assignment of the DMACSoftLBReq register.
Table 11-12. Bit Assignment of DMACSoftLBReq register
DMACSoftLBReq
Bits
Type
Function
SoftLBReq
[15:0]
R/W
Software last burst request
Software last single request register, DMACSoftLSReq
The DMACSoftLSReq read/write register allows DMA last single requests to be generated by software. A DMA
request can be generated for each source by writing a 1 to the corresponding register bit. A register bit is cleared
when the transaction is complete. Writing 0 to this register has no effect.
Reading the register indicates which sources are requesting last single DMA transfers. A request can be generated
from either a peripheral or the software request register.
Table 11-13 shows the bit assignment of the DMACSoftLSReq register.
Table 11-13. Bit Assignment of DMACSoftLSReq register
DMACSoftLSReq
Bits
Type
Function
SoftLSReq
[15:0]
R/W
Software last single request