PRELIMINARY
IRDA
S3C6400X RISC MICROPROCESSOR
38-18
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
IRDA PREAMBLE LENGTH REGISTER(IRDA_PLR)
Register
Address
R/W
Description
Reset Value
IrDA _PLR 0x7F00_701C R/W
IrDA Preamble Length Register
0x12
REG_PLR
Bit
Description
Initial State
Preamble length
in FIR mode
[7:6]
These two bits decide preamble length to be transmitted
at the beginning of each frame in FIR mode. The default
value of PLR[7:6] = ‘00’ which is equal to 16 preambles.
00
TX FIFO trigger level
select
[5:4]
Transceiver FIFO trigger level selection.
Bit 5
Bit 4
64-byte FIFO
0 0 Reserved
0 1
48
1 0
32
1 1
08
Note:
Tx Trigger level value means total number data empty.
01
Number of start flags in
MIR mode
[3:0]
Number of start flags in MIR mode. The number of start
flags to be transmitted at the beginning of a frame is equal
to the IrDA_PLR [3:0] value.
The minimum value is 3
.
0010
IRDA RECEIVER & TRANSMITTER BUFFER REGISTER(IRDA_RBR)
Register
Address
R/W
Description
Reset Value
IrDA_RBR
IrDA_THR
0x7F00_7020
R/W
IrDA Receiver & Transmitter Buffer Register
0x00
IrDA _RBR
Bit
Description
Initial State
Rx/Tx data
[7:0]
Received data (When read data)
Data to transmit (When write data)
0x00
IRDA TOTAL NUMBER OF DATA BYTES REMAINED IN TX FIFO(IRDA_TXNO)
Register
Address
R/W
Description
Reset Value
IrDA
_TXNO
0x7F00_7024
R
The total number of data bytes remained in Tx FIFO
0x00