PRELIMINARY
S3C6400X RISC MICROPROCESSOR
USB2.0 HS OTG
26-35
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
The power-on reset value of this register is specified
as the Largest Host Mode Periodic Tx Data FIFO
Depth (6144).
A new value must be written to this field.
Programmed values must not exceed the power-on
value set.
PTxFStAddr [15:0]
R_W
Host Periodic TxFIFO Start Address
The power-on reset value of this register is sum of
the Largest Rx Data FIFO Depth and Largest Non –
Periodic Tx Data FIFO Depth specified.
If you have programmed new values for the RxFIFO
or Non-Periodic TxFIFO, you can write their sum in
this field. Programmed values must not exceed the
power-on value set.
16’h3000
DEVICE PERIODIC TRANSMIT FIFO-n SIZE REGISTER (DPTXFSIZn)
FIFO_number : 1
≤
n
≤
15
This register holds the memory start address of each periodic TxFIFO to implement in Device mode. Each
periodic FIFO holds the data for one periodic IN endpoint. This register is repeated for each periodic FIFO
instantiated.
Register
Address
R/W
Description
Reset Value
DPTXFSIZn 0x7C00_0104
+(n-1)*04h
R/W
Device Periodic Transmit FIFO - n Size Register
32 bits
DPTXFSIZn
Bit
R/W
Description
Initial State
DPTxFSize [31:16]
R_W
Device Periodic TxFIFO Size
This value is in terms of 32-bit words
·
Minimum value is 4
·
Maximum value is 768
The power-on reset value of this register is the
Largest Device Mode Periodic Tx Data FIFO-n
Depth. You can write a new value to this field.
n :1 (16’h300)
n :2 (16’h300)
n :3 (16’h300)
n :4 (16’h300)
n :5 (16’h300)
n :6 (16’h300)
n :7 (16’h300)
n :8 (16’h300)
n :9 (16’h300)
n :10 (16’h300)
n :11 (16’h300)
n :12 (16’h300)
n :13 (16’h300)
n :14 (16’h300)
n :15 (16’h300)