PRELIMINARY
S3C6400X RISC MICROPROCESSOR
SYSTEM CONTROLLER
3-33
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
AHB bus control register
Most multimedia IPs are connected through AHB 2.0 bus system. The bus priority can be controlled using the
following three registers.
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
AHB_CON0
0x7E00_F100
R/W
Configure AHB I/P/X/F bus
0x0400_0000
AHB_CON1
0x7E00_F104
R/W
Configure AHB M1/M0/T1/T0 bus
0x0000_0000
AHB_CON2 0x7E00_F108
R/W
Configure AHB R/S1/S0 bus
0x0000_0000
The arbitration method for each AHB bus can be configured using “PRIOR_TYPE_
name
” field as follows
z
00: Fixed priority type. Its priority is defined using “FIX_PRIOR_
name
” field.
z
01: Last grant lowest. Last granted master has lowest arbitration value.
z
10:
Rotation.
When the priority type filed selects the fixed priority (00), the priority order is defined as follows,
FIX_PRIOR_nam
e
Highest
000
0 – 1 – 2 – 3 – 4 – 5 – 6 – 7
001
1 – 2 – 3 – 4 – 5 – 6 – 0 – 7
010
2 – 3 – 4 – 5 – 6 – 0 – 1 – 7
011
3 – 4 – 5 – 6 – 0 – 1 – 2 – 7
100
4 – 5 – 6 – 0 – 1 – 2 – 3 – 7
101
5 – 6 – 0 – 1 – 2 – 3 – 4 – 7
110
6 – 0 – 1 – 2 – 3 – 4 – 5 – 7
DISABLE_HLOCK field controls the locked operation of AHB bus system. When a master request locked
operation, a bus arbiter gives a grant when the field is ‘0’. If the field is ‘1’, the master cannot get a locked grant.