Samsung S3C6400X, User Manual, Page: 411 / 1189

PRELIMINARY
S3C6400X RISC MICROPROCESSOR DISPLAY CONTROLLER
14-49
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
VIDOSD0C Bit Description initial
state
- [25:24] Reserved 0
OSDSIZE [23:0] Window Size
Eq. Height * Width (Number of Word)
Note. Set filed value for YUV if (TV Encoder IF)
0
Window 1 Position Control A Register
Register Address R/W Description Reset
Value
VIDOSD1A 0x77100050 R/W Video Window 1’s position control 2 register 0x0
VIDOSD1A Bit Description initial
state
OSD_LeftTopX_F [21:11] Horizontal screen coordinate for left top pixel of OSD image 0
OSD_LeftTopY_F [10:0] Vertical screen coordinate for left top pixel of OSD image
(for interlace TV output, this value MUST be set to half of the
original screen y coordinate. And the original screen y coordinate
MUST be even value.)
0
Window 1 Position Control B Register
Register Address R/W Description Reset
Value
VIDOSD1B 0x77100054 R/W Video Window 1’s position control register 0x0
VIDOSD1B Bit Description initial
state
OSD_RightBotX_F [21:11] Horizontal screen coordinate for right bottom pixel of OSD image 0
OSD_RightBotY_F [10:0] Vertical screen coordinate for right bottom pixel of OSD image
(for interlace TV output, this value MUST be set to half of the
original screen y coordinate. And the original screen y coordinate
MUST be odd value.)
0
Note. Registers must have word boundary X position.
So, 24 BPP mode must have X position by 1 pixel. ( ex, X = 0,1,2,3….)
16 BPP mode must have X position by 2 pixel. ( ex, X = 0,2,4,6….)
8 BPP mode must have X position by 4 pixel. ( ex, X = 0,4,8,12….)