Samsung S3C6400X, User Manual, Page: 417 / 1189

PRELIMINARY
S3C6400X RISC MICROPROCESSOR DISPLAY CONTROLLER
14-55
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
FRAME Buffer Address 0 Register
Register Address R/W Description Reset Value
VIDW00ADD0B0 0x771000A0 R/W Window 0’s buffer start address register, buffer 0 0x0
VIDW00ADD0B1 0x771000A4 R/W Window 0’s buffer start address register, buffer 1 0x0
VIDW01ADD0B0 0x771000A8 R/W Window 1’s buffer start address register, buffer 0 0x0
VIDW01ADD0B1 0x771000AC R/W Window 1’s buffer start address register, buffer 1 0x0
VIDW02ADD0 0x771000B0 R/W Window 2’s buffer start address register 0x0
VIDW03ADD0 0x771000B8 R/W Window 3’s buffer start address register 0x0
VIDW04ADD0 0x771000C0 R/W Window 4’s buffer start address register 0x0
VIDWxxADD0 Bit Description Initial State
VBANK_F [31:24] These bits indicate A[31:24] of the bank location for the video buffer
in the system memory.
0
VBASEU_F [23:0] These bits indicate A[23:0] of the start address of the Video frame
buffer. 0
FRAME Buffer Address 1 Register
Register Address R/W Description Reset Value
VIDW00ADD1B0 0x771000D
0
R/W Window 0’s buffer end address register, buffer 0 0x0
VIDW00ADD1B1 0x771000D
4
R/W Window 0’s buffer end address register, buffer 1 0x0
VIDW01ADD1B0 0x771000D
8
R/W Window 1’s buffer end address register, buffer 0 0x0
VIDW01ADD1B1 0x771000D
C
R/W Window 1’s buffer end address register, buffer 1 0x0
VIDW02ADD1 0x771000E
0
R/W Window 2’s buffer end address register 0x0
VIDW03ADD1 0x771000E
8
R/W Window 3’s buffer end address register 0x0
VIDW04ADD1 0x771000F0 R/W Window 4’s buffer end address register 0x0
VIDWxxADD1 Bit Description Initial State
VBASEL_F [23:0] These bits indicate A[23:0] of the end address of the Video frame
buffer.
VBASEL =
(PAOFFSIZE) x (1)
0x0