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PRELIMINARY
S3C6400 RISC MICROPROCESSOR
GPIO
10-
71
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
EINT12PEND
Bit
Description
Initial State
Reserved [31:24]
Reserved
0
EINT2[m]
[16+m]
m = 0 ~ 7
0 = Not occur
1= Occur interrupt
0
Reserved [15]
Reserved
0
EINT1[n]
[n]
n = 0 ~ 14
0 = Not occur
1= Occur interrupt
0
EINT34PEND
Bit
Description
Initial State
Reserved [31:30]
Reserved
0
EINT4[m]
[16+m]
m = 0 ~ 13
0 = Not occur
1= Occur interrupt
0
Reserved [15:5]
Reserved
0
EINT3[n]
[n]
n = 0 ~ 4
0 = Not occur
1= Occur interrupt
0
EINT56PEND
Bit
Description
Initial State
Reserved [31:26]
Reserved
0
EINT6[m]
[16+m]
m = 0 ~ 9
0 = Not occur
1= Occur interrupt
0
Reserved [15:7]
Reserved
0
EINT5[n]
[n]
n = 0 ~ 6
0 = Not occur
1= Occur interrupt
0
EINT78PEND
Bit
Description
Initial State
EINT8[m]
[16+m]
m = 0 ~ 14
0 = Not occur
1= Occur interrupt
0
EINT7[n]
[n]
n = 0 ~ 15
0 = Not occur
1= Occur interrupt
0
EINT9PEND
Bit
Description
Initial State
Reserved [31:9]
Reserved
0
EINT9[n]
[n]
n = 0 ~ 8
0 = Not occur
1= Occur interrupt
0