PRELIMINARY
GPIO
S3C6400 RISC MICROPROCESSOR
10-
24
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
GPI14
[29:28]
00 = Input
01 = Output
10 = LCD VD[14]
11 = reserved
00
GPI15
[31:30]
00 = Input
01 = Output
10 = LCD VD[15]
11 = reserved
00
GPIDAT
Bit
Description
GPI[15:0]
[15:0]
When the port is configured as input port, the corresponding bit is the pin state.
When the port is configured as output port, the pin state is the same as the
corresponding bit. When the port is configured as functional pin, the undefined
value will be read.
GPIPUD
Bit
Description
GPI[n] [2n+1:2n]
n = 0~15
00 = pull-up/down disabled
01 = pull-down enabled
10 = pull-up enabled
11 = Reserved.
GPISLPCON
Bit
Description
Initial State
GPI[n] [2n+1:2n]
n = 0~15
00 = output 0
01 = output 1
10 = input
11 = Previous state
00
GPIPUDSLP
Bit
Description
GPI[n] [2n+1:2n]
n = 0~15
00 = pull-up/down disabled
01 = pull-down enabled
10 = pull-up enabled
11 = Reserved.
Note:
1. When LCD Bypass mode is set (MIFPCON[3]=1) in sleep mode, GPISLPCON and GPIPUDSLP cannot
control I port. Because in this case I port IO cells are controlled by Host I/F block(Modem I/F block) and
signals from K, L, M port IO cells. For more information, please refer to figure 10-3.