Samsung S3C6400X, User Manual, Page: 167 / 1189

PRELIMINARY
NAND FLASH CONTROLLER S3C6400X RISC MICROPROCESSOR
8-6
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Data Register Configuration
1) 8-bit NAND Flash Memory Interface
A. Word Access
Register Endian Bit [31:24] Bit [23:16] Bit [15:8] Bit [7:0]
NFDATA Little
4
th
I/O[ 7:0] 3
rd
I/O[ 7:0] 2
nd
I/O[ 7:0] 1
st
I/O[ 7:0]
B. Half-word Access
Register Endian Bit [31:24] Bit [23:16] Bit [15:8] Bit [7:0]
NFDATA Little Invalid value Invalid value 2
nd
I/O[ 7:0] 1
st
I/O[ 7:0]
C. Byte Access
Register Endian Bit [31:24] Bit [23:16] Bit [15:8] Bit [7:0]
NFDATA Little Invalid value Invalid value Invalid value 1
st
I/O[ 7:0]
STEPPINGSTONE (4KB SRAM)
The NAND Flash controller uses Steppingstone as the buffer on booting and also you can use this area for
various other purpose.