PRELIMINARY
USB2.0 HS OTG
S3C6400X RISC MICROPROCESSOR
26-20
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DbnceDone
[19] R_SS_
WC
Debounce Done
The core sets this bit when the debounce is
completed after the device connects. This bit is only
valid when the HNP Capable or SRP Capable bit is
set in the Core USB Configuration register.
1’b0
ADevTOUTChg [18]
R_SS_
WC
A-Device Timeout Change
The core sets this bit to indicate that the A-device
has timed out while waiting for the B-device to
connect.
1’b0
HstNegDet [17]
R_SS_
WC
Host Negotiation Detected
The core sets this bit when it detects a host
negotiation request on the USB.
1’b0
[16:10]
Reserved
7’h0
HstnegSucStsChn
g
[9] R_SS_
WC
Host Negotiation Success Status Change
The core sets this bit on the success or failure of a
USB host negotiation request.
1’b0
SesReqSucStsCh
ng
[8] R_SS_
WC
Session Request Success Status Change
The core sets this bit on the success or failure of a
session request.
1’b0
[7:3]
Reserved
5’h0
SesEndDet [2]
R_SS_
WC
Session End Detected
The core sets this bit when the b_valid signal is
deasserted.
1’b0
[1:0]
Reserved
2’h0
OTG AHB CONFIGURATION REGISTER (GAHBCFG)
This register can be used to configure the core after power-on or a change in mode of operation. This register
mainly contains AHB system-related configuration parameters. Do not change this register after the initial
programming. The application must program this register before starting any transactions on either the AHB or the
USB.
Register
Address
R/W
Description
Reset Value
GAHBCFG
0x7C00_0008
R/W
Core AHB Configuration Register
32 bits
GAHBCFG
Bit
R/W
Description
Initial State
[31:9]
Reserved
23’h0
PTxFEmpLvl
[8]
R_W
Periodic TxFIFO Empty Level
Indicates when the Periodic TxFIFO Empty Interrupt
bit in the Core Interrupt register
(GINTSTS.PTxFEmp) is triggered. This bit is used
only in Slave mode.
·
1’b0 : GINTSTS.PTxFEmp interrupt indicates that
1’b0