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PRELIMINARY
DISPLAY CONTROLLER
S3C6400X RISC MICROPROCESSOR
14-52
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Window 2 Position Control D Register
Register
Address
R/W
Description
Reset
Value
VIDOSD2D
0x7710006C
R/W
Video Window 0’s Size control register
0x0
VIDOSD2D
Bit
Description
initial
state
- [25:24]
Reserved
0
OSDSIZE [23:0]
Window
Size
Eq. Height * Width(Number of Word)
Note. Set filed value for YUV if (TV Encoder IF)
0
Window 3 Position Control A Register
Register
Address
R/W
Description
Reset
Value
VIDOSD3A
0x77100070
R/W
Video Window 3’s position control register
0x0
VIDOSD3A
Bit
Description
initial
state
OSD_LeftTopX_F
[21:11]
Horizontal screen coordinate for left top pixel of OSD image
0
OSD_LeftTopY_F
[10:0]
Vertical screen coordinate for left top pixel of OSD image
(for interlace TV output, this value MUST be set to half of the
original screen y coordinate. And the original screen y coordinate
MUST be even value.)
0
Window 3 Position Control B Register
Register
Address
R/W
Description
Reset
Value
VIDOSD3B
0x77100074
R/W
Video Window 3’s position control register
0x0
VIDOSD3B
Bit
Description
initial
state
OSD_RightBotX_F [21:11] Horizontal screen coordinate for right bottom pixel of OSD image
0
OSD_RightBotY_F
[10:0]
Vertical screen coordinate for right bottom pixel of OSD image
(for interlace TV output, this value MUST be set to half of the
original screen y coordinate. And the original screen y coordinate
MUST be odd value.)
0