PRELIMINARY
DISPLAY CONTROLLER
S3C6400X RISC MICROPROCESSOR
14-58
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
INTFIFOPEND
[0]
FIFO Level interrupt. To clear this bit, write “1” .
0 = The interrupt has not been requested
1 = FIFO empty status has asserted the interrupt request
0
Win1 Color Key 0 Register
Register
Address
R/W
Description
Reset Value
W1KEYCON0
0x77100140
R/W
Color key control register
0x000000
W1KEYCON0
Bit
Description
Initial state
KEYBLEN
[26]
Color Key (Chroma key ) Enable control
0 = Disable ( blending operation disable )
1 = Blending using ALPHA0_x for non-key area, ALPHA1_x for key
area (x=R, G, B)
0
KEYEN_F
[25]
Color Key (Chroma key ) Enable control
0 = color key disable
1 = color key enable
0
DIRCON
[24]
Color key (Chroma key)direction control
0 = If the pixel value of fore-ground image matches with COLVAL, the
pixel from back-ground image is displayed ( only in OSD area)
1 = If the pixel value of back-ground matches with COLVAL, the pixel
from fore-ground image is displayed ( only in OSD area)
0
COMPKEY
[23:0]
Each bit is correspond to the COLVAL[23:0].
If some position bit is set then that position bit of COLVAL will be
ignored in the fore-ground or back-ground match.
0
Note.
Set BLD_PIX = 1, ALPHA_SEL =0 to use alpha blending using color key,
WIN 1 Color key 1 Register
Register
Address
R/W
Description
Reset Value
W1KEYCON1
0x77100144
R/W
Color key value ( transparent value) register
0x0000_000
0
W1KEYCON1
Bit
Description
Initial state
COLVAL
[23:0]
Color key value for the transparent pixel effect.
0
Win2 Color Key 0 Register
Register
Address
R/W
Description
Reset Value
W2KEYCON0
0x77100148
R/W
Color key control register
0x00000