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PRELIMINARY
S3C6400X RISC MICROPROCESSOR
USB2.0 HS OTG
26-55
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DEVICE IN TOKEN SEQUENCE LEARNING QUEUE READ REGISTER 4 (DTKNQR4)
Read from this register returns the next 8 endpoint entries of the learning queue.
Register
Address
R/W
Description
Reset Value
DTKNQR4
0x7C00_0834
R
Device IN Token Sequence Learning Queue Read
Register 4
32 bits
DTKNQR4
Bit
R/W
Description
Initial State
EPTkn
[31:0]
RO
Endpoint Token
Four bits per token represent the endpoint number of
the token:
·
Bits [31:28] : Endpoint number of Token 29
·
Bits [27:24] : Endpoint number of Token 28
···
·
Bits [7:4] : Endpoint number of Token 23
·
Bits [3:0] : Endpoint number of Token 22
32’h0
DEVICE VBUS DISCHARGE TIME REGISTER (DVBUSDIS)
This register specifies the Vbus discharge time after Vbus pulsing during SRP.
Register
Address
R/W
Description
Reset Value
DVBUSDIS
0x7C00_0828
R/W
Device VBUS Discharge Time Register
32 bits
DVBUSDIS
Bit
R/W
Description
Initial State
[31:16]
Reserved
16’h0
DVBUSDis
[15:0]
R_W
Device Vbus Discharge Time
Specifies the Vbus discharge time after Vbus pulsing
during SRP. This value equals :
Vbus discharge time in PHY clocks /1,024
16’h0B8F
DEVICE VBUS PULSING TIME REGISTER (DVBUSPULSE)
This register specifies the Vbus discharge time during SRP.
Register
Address
R/W
Description
Reset Value
DVBUSPULSE 0x7C00_082C R/W
Device VBUS Discharge Time Register
32 bits
DVBUSPULSE
Bit
R/W
Description
Initial State
[31:12]
Reserved
16’h0
DVBUSPulse
[11:0]
R_W
Device Vbus Pulsing Time
Specifies the Vbus pulsing time during SRP. This
12’h2C6