Samsung S3C6400X, User Manual, Page: 65 / 1189

PRELIMINARY
SYSTEM CONTROLLER S3C6400X RISC MICROPROCESSOR
3-20
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
MEM_CFG_STAT 0x7E00_F12C R Memory subsystem setup status 0x0000_0000
RESERVED
0x7E00_F200~
0x7E00_F800
- RESERVED -
PWR_CFG 0x7E00_F804 R/W Configure power manager 0x0000_0001
EINT_MASK 0x7E00_F808 R/W Configure EINT(external interrupt) mask 0x0000_0000
RESERVED 0x7E00_F80C - RESERVED -
NORMAL_CFG 0x7E00_F810 R/W Configure power manager at NORMAL mode 0xFFFF_FF00
STOP_CFG 0x7E00_F814 R/W Configure power manager at STOP mode 0x2012_0100
SLEEP_CFG 0x7E00_F818 R/W Configure power manager at SLEEP mode 0x0000_0000
RESERVED 0x7E00_F81C - RESERVED -
OSC_FREQ 0x7E00_F820 R/W Oscillator frequency scale counter 0x0000_000F
OSC_STABLE 0x7E00_F824 R/W Oscillator pad stable counter 0x0000_0001
PWR_STABLE 0x7E00_F828 R/W Power stable counter 0x0000_0001
RESERVED 0x7E00_F82C - RESERVED -
MTC_STABLE 0x7E00_F830 R/W MTC stable counter 0xFFFF_FFFF
RESERVED
0x7E00_F834~
0x7E00_F8FC
- RESERVED -
OTHERS 0x7E00_F900 R/W Others control register 0x0000_801E
RST_STAT 0x7E00_F904 R Reset status register 0x0000_0001
WAKEUP_STAT 0x7E00_F908 R/W Wakeup status registers 0x0000_0000
BLK_PWR_STAT 0x7E00_F90C R Block power status register 0x0000_007F
INFORM0 0x7E00_FA00 R/W Information register0 0x0000_0000
INFORM1 0x7E00_FA04 R/W Information register1 0x0000_0000
INFORM2 0x7E00_FA08 R/W Information register2 0x0000_0000
INFORM3 0x7E00_FA0C R/W Information register3 0x0000_0000
SFRs consist of five parts. The SFRs, whose address are 0x7E00_F0XX, controls PLL and the clock generators.
They control the output frequency of three PLL’s, clock source selection, and clock divider ratio. The SFR’s,
whose address is 0x7E00_F1XX, control the bus system, the memory system, and software resets. The SFRs,
whose address is 0x7E00_F8XX, control the power management block. The SFRs, whose address is
0x7E00_F9XX, show the internal status. The information registers, whose address is 0x7E00_FA0X, save user
information until the hardware reset signal (XnRESET) is asserted.