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instructions. Therefore, most instructions seem to be processed in one machine cycle as
soon as the pipeline has been filled (see figure below).
Instruction pipelining increases the average instruction throughput over a certain period of
time. Specification of instruction execution time always refers to the average execution time
of pipelined parallel instruction processing.
4.1.2
Standard branch instruction processing
Instruction pipelining speeds up sequential program processing. When a branch is taken,
the instruction which has already been fetched is not usually the instruction which must be
decoded next. Thus, at least one additional machine cycle is normally required to fetch the
branch target instruction. This extra machine cycle is provided by means of an injected
instruction (see figure below).
If a conditional branch is not taken, there is no deviation from the sequential program flow
and no extra time is required. In this case, the instruction after the branch instruction will
enter the decode stage of the pipeline - at the beginning of the next machine cycle - after
decode of the conditional branch instruction.
Figure 9 Sequential instruction pipelining
1 Machine
Cycle
FETCH
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DECODE
EXECUTE
WRITEBACK
time
