ST10R272L - EXTERNAL BUS INTERFACE
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Note
SYSCON register cannot be changed after execution of the EINIT instruction.
Bit SGTDIS controls the correct stack operation (push/pop of CSP or not) during
traps and interrupts. Bits marked with “-” must be kept at 0.
The layout of the five BUSCON registers is identical. Registers BUSCON4...BUSCON1,
which control the selected address windows, are completely under software control, while
register BUSCON0, which e.g. is also used for the very first code access after reset, is partly
controlled by hardware, i.e. it is initialized via PORT0 during the reset sequence. This
hardware control allows to define an appropriate external bus for systems, where no internal
program memory is provided. The active level of the READY pin can be selected by software
via the RDYPOL bit. When the READY function is enabled for a specific address window,
each bus cycle within this window must be terminated with the active level defined by the
RDYPOL bit in the associated BUSCON register
CLKEN
System Clock Output Enable (CLKOUT)
‘0’: CLKOUT disabled: pin may be used for general purpose IO
‘1’: CLKOUT enabled: pin outputs the system clock signal
BYTDIS
Disable/Enable Control for Pin BHE (Set according to data bus width)
‘0’: Pin BHE enabled
‘1’: Pin BHE disabled, pin may be used for general purpose IO
ROMEN
Internal ROM Enable (Set according to pin EA during reset)
‘0’: Internal ROM disabled: accesses to the ROM area use the external bus
‘1’: Internal ROM enabled
This bit is not relevant on the ST10R262 since it does not include internal ROM. It
should be kept to 0
SGTDIS
Segmentation Disable/Enable Control
‘0’: Segmentation enabled (CSP is saved/restored during interrupt entry/exit)
‘1’: Segmentation disabled (Only IP is saved/restored)
ROMS1
Internal ROM Mapping
‘0’: Internal ROM area mapped to segment 0 (00’0000h...00’7FFFh)
‘1’: Internal ROM area mapped to segment 1 (01’0000h...01’7FFFh)
This bit is not relevant on the ST10R262 since it does not include internal ROM. It
should be kept to 0.
STKSZ
System Stack Size
Selects the size of the system stack (in the internal RAM) from 32 to 1024 words
Bit
Function
