ST10R272L - CENTRAL PROCESSING UNIT
55/320
the RETS and RETI instructions. On the acceptance of an interrupt, or the execution of a
software TRAP instruction, the CSP register is automatically set to zero
CSP (FE08h / 04h)
SFR
Reset Value: 0000h
Note
When segmentation is disabled, the IP value is used directly as the 16-bit address.
The data page pointers DPP0, DPP1, DPP2, DPP3
These four non bit-addressable registers select up to four different data pages being active
simultaneously at run-time. The lower 10 bits of each DPP register select one of the 1024
possible 16-Kbyte data pages, and the upper 6 bits are reserved for future use. The DPP
registers give access to the entire memory space - in pages of 16Kbytes each.
Bit
Function
SEGNR
Segment Number
Specifies the code segment, from where the current instruction is to be fetched.
SEGNR is ignored when segmentation is disabled.
Figure 12 Addressing via the code segment pointer
-
-
-
-
-
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
-
-
-
r
-
-
-
-
-
-
-
-
SEGNR
0
1
255
254
Code Segment
00’0000H
FF’FFFFH
01’0000H
FE’0000H
CSP Register
IP Register
0
0
15
15
24/20/18 bit Physical Code Address
