ST10R272L - MEMORY ORGANIZATION
33/320
indirect addresses. The GPRs R15...R0 are duplicated, i.e. they are accessible within both
register blocks via short 2-, 4- or 8-bit addresses, without switching.
To minimize the use of the EXTR instructions, the ESFR area holds registers which are
mainly required for initialization and mode selection. Wherever possible, registers that need
to be accessed frequently, are allocated to the standard SFR area.
Note
The development tools are equipped to monitor accesses to the ESFR area and will
automatically insert EXTR instructions, or issue a warning in case of missing or
excessive EXTR instructions.
3.2
External memory space
The ST10R272L uses an address space of up to 16 MByte. Only parts of this address space
are occupied by internal memory areas. All addresses which are not used for on-chip RAM,
registers or internal Xperipherals, may reference external memory locations through the
External Bus Interface.
Four memory bank sizes are supported:
EXTR
#4
;Switch to ESFR area for the next 4 instructions
MOV
ODP2, #data16
;ODP2 uses 8-bit reg addressing
BFLDL
DP6, #mask, #data8
;Bit addressing for bit fields
BSET
DP1H.7
;Bit addressing for single bits
MOV
T8REL, R1
;T8REL uses 16-bit address, R1 is duplicated...
;...and also accessible via the ESFR mode
;(EXTR is not required for this access)
;------
;-------------------
;The scope of the EXTR #4 instruction ends here!
MOV
T8REL, R1
;T8REL uses 16-bit address, R1 is duplicated...
;...and does not require switching
Table 5 Example of the EXTR instruction
Non-segmented mode:
64KByte with A15...A0 on PORT0 or PORT1.
2- bit segmented mode: 256 KByte with A17...A16 on Port 4 and A15...A0 on PORT0 or
PORT1.
4-bit segmented mode:
1 MByte with A19...A16 on Port 4 and A15...A0 on PORT0 or
PORT1.
