ST10R272L - INTERRUPT AND TRAP FUNCTIONS
87/320
xxIC (yyyyh / zzh)
SFR
Reset Value: - - 00h
Interrupt priority level and group level. The four bits of bit field ILVL specify the priority
level of a service request for the arbitration of simultaneous requests. The priority increases
with the numerical value of ILVL, so 0000b is the lowest and 1111b is the highest priority
level.
When more than one interrupt request on a specific level becomes active at the same time,
the values in the respective bit fields GLVL are used for second level arbitration. Again, the
group priority increases with the numerical value of GLVL, so 00b is the lowest and 11b is
the highest group priority.
The Interrupt request flag is set by hardware whenever a service request from the
respective source occurs. It is cleared automatically on entry into the interrupt service
routine or on a PEC service. For PEC services, the interrupt request flag remains set if the
COUNT field in the PECCx register of the selected PEC channel decrements to zero.
Therefore, a normal CPU interrupt can respond to a completed PEC block transfer.
Bit
Function
GLVL
Group Level
Defines the internal order for simultaneous requests of the same priority.
3: Highest group priority
0: Lowest group priority
ILVL
Interrupt Priority Level
Defines the priority level for the arbitration of requests.
Fh: Highest priority level
0h: Lowest priority level
xxIE
Interrupt Enable Control Bit (individually enables/disables a specific source)
‘0’: Interrupt request is disabled
‘1’: Interrupt Request is enabled
xxIR
Interrupt Request Flag
‘0’: No request pending
‘1’: This source has raised an interrupt request
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
rw
rw
-
-
-
-
rw
rw
-
-
-
-
xxIE
xxIR
GLVL
ILVL
