ST ST10R272L, User Manual

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ST10R272L - EXTERNAL BUS INTERFACE
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9.4.1 Registers
SYSCON (FF12h / 89h) SFR Reset Value: 0XX0h)
Bit Function
XPER-
SHARE
XBUS Peripheral Share Mode Control
‘0’: External accesses to XBUS peripherals are disabled
‘1’: XBUS peripherals are accessible via the external bus during hold mode.
VISIBLE
Visible Mode Control
‘0’: Accesses to XBUS peripherals are done internally
‘1’: XBUS peripheral accesses are made visible on the external pins.
SSPEN
Xperipheral SSP Enable Control
‘0’: SSP is disabled. Pins P4.[7..4] are general purpose I/Os or segment address
lines
‘1’: SSP is enabled. Pins P4.[7..4] are SSP IOs or segment address lines
OWDDIS
Oscillator Watchdog Disable Control
‘0’: Oscillator Watchdog (OWD) is enabled. If PLL is bypassed, the OWD monitors
XTAL1 activity. If there is no activity on XTAL1 for at least 1 ms, the CPU clock is
switched automatically to PLL’s base frequency (around 5 MHz).
‘1’: OWD is disabled. If the PLL is bypassed, the CPU clock is always driven by
XTAL1 signal. The PLL is turned off to reduce the power supply current.
PWDCFG
Power Down Mode Configuration Control
‘0’: Power Down Mode can only be entered during PWRDN instruction execution if
NMI pin is low, otherwise the instruction has no effect. To exit Power Down Mode, an
external reset must occurs by asserting the RSTIN pin.
‘1’: Power Down Mode can only be entered during PWRDN instruction execution if all
enabled fast external interrupt EXxIN pins are in their inactive level. Exiting this mode
can be done by asserting one enabled EXxIN pin.
CSCFG
Chip Select Configuration Control
‘0’: Latched Chip Select lines: CSx change 1 TCL after rising edge of ALE
‘1’: Unlatched Chip Select lines: CSx change with rising edge of ALE
WRCFG
Write Configuration Control (Set according to pin P0H.0 during reset)
‘0’: Pins WR and BHE retain their normal function
‘1’: Pin WR acts as WRL, pin BHE acts as WRH
XPER-
SHARE
VISI
BLE
CS
CFG
PWD
CFG
OWD
DIS
-
SSP
EN
ROM
S1
WR
CFG
5 4 3 2 1 0 11 10 9 8 7 6 15 14 13 12
rw - rw rw rw rw rw rw
STKSZ
SGT
DIS
ROM
EN
rw
BYT
DIS
CLK
EN
rw rw rw rw rw